Modern electronic systems such as radio-enabled systems often have low power dissipation requirements while operating in transmit and/or receive modes. These systems also often require a self-testing and self-calibration capability that is cost effective. To save cost, the substrate area of an integrated circuit (IC) used to implement a self-test and self-calibration capability for a radio device such as a transceiver is often minimized by using as single frequency synthesizer from which receive and transmit clock signals are derived. Such an approach often requires complicated clock distribution schemes that consume relatively large amounts of power and that use additional buffers, which significantly degrades the dynamic range of the system.
In products that have the need to perform built-in self-calibration (BISC) of various parameters of the receiver, a lower-performance oscillator can be included on the substrate circuitry in order to save area of the substrate that would otherwise be required to implement a higher-performance oscillator. However, the low performance oscillator can significantly impact the BISC accuracy due to the low fidelity of the low-performance oscillator. At the same time, any BISC technique should consume minimum additional area to be implemented in silicon to reduce any additional costs.